Si4320
STANDALONE OPERATION
The chip supports standalone operation, meaning that with preprogrammed (hard wired) parameters, a simple receiver can be built without
an external microcontroller. After the power-up sequence, the status of pin 8 is queried by connecting internally about 10 μA current on it. If
VSS or VDD is detected, the chip turns to standalone mode. In this case 7 pins are used to configure the receiver and 4 digital outputs are
available:
FCS 0
FB S 0
FB S 1
OUT0
OUT1
OUT2
OUT3
LPDM
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
FCS 3
FCS 2
V DD
IN1
IN2
VSS
FCS 1
XTL
In the standalone mode, a predefined data sequence should be employed which contains preamble, synchron, chip address, and function
control bytes. To allow the control of the outputs, the chip should receive its chip address byte and twice the same function control byte.
The required data flow sequence:
Preamble Byte
Synchron Byte
Chip Address
Byte
Function
Control Byte
One’s complement
of Function Control
Byte
Function
Control Byte
D4h
AAh
2Dh
D2h
B4h
See below
See below
See below
B2h
As a minimum preamble, use at least 16 bits.
The structure of the Function Control Byte is shown below. For each output there are two bits assigned to define their mode of operation:
OUT3
F1
OUT3
F0
OUT2
F1
OUT2
F0
OUT1
F1
OUT1
F0
OUT0
F1
OUT0
F0
OUT3 / F1 sent out first., OUT0 – OUT3 represent the four digital output pins, F0 - F1 represents the function bits.
Output functions controlled by the function bits, as follows:
F1
0
0
1
1
F0
0
1
0
1
Function
No change
Sets output logical low
Sets output logical high
Sets output high in mono-stable mode, cycle time is 100 ms
Mono-stable mode will be restarted as long as the proper Function Control Byte is received.
20
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